Courses Currently Offered in English

Course Version

Course Code:EDSPA
Version Number:1
Course Name:Digital Signal Processor Architecture and Programming
Credit Units:4
ECTS:6
Cost Units:30
Examination type (E-with exam):E
Grading threshold:5
Initiation semester:01Z
Person responsible:mgr inż. Henryk Kowalski
Description:ICT programme taught in English

Hours per week

Class typeHours
W2
L1
P1

Class types: W - lecture, C - tutorial, L - laboratory, P - project

Prerequisites

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Prerequitise types: W - required, Z - recommended

Similar Courses

Course CodeNameDiscount CUDiscount ECTS
APSYArchitektura procesorów sygnałowych45
PSProcesory sygnałowe45
PSAPProcesory sygnałowe - architektura i programowanie45

Last Course Instances

Semester codeInstance codeLecturerInstituteMax. number of students
18ZAmgr inż. Henryk KowalskiIN24

Thematic Classification

Class CodeClass name (in Polish)
ANGLAll Courses in English (A)
SYKSystemy komputerowe
TUPSTechniki i układy przetwarzania sygnałów

Conspectus

Summary (in Polish)

Prezentacja budowy i zastosowania nowoczesnych procesorów sygnałowych. Przegląd najważniejszych architektur procesorów sygnałowych oraz sposobów ich programowania. Pozwala na zaznajomienie się z przeznaczonym dla tych procesorów narzędziami programowymi, językami asemblerowymi i wysokiego poziomu oraz systemami operacyjnymi czasu rzeczywistego. Umożliwia praktyczne zweryfikowanie nabytej wiedzy podczas pracy w środowisku sprzętowo-programowym wiodących producentów.

Lecture contents
  1. Introduction: general information, basic definitions, Harvard architecture, features of DSP, comparisons of general-purpose processors and DSP, DSP evolution, typical applications, fixed point and floating point DSP

  2. DSP processors architecture: data arithmetic operations, data representations, dedicated arithmetic operations, typical DSP block diagram, data and program memory, buses, on-chip peripherals, expansion ports, on-chip debugging interface.

  3. Overview of a core CPU architecture: data ALU, address generation unit, program controller, stack, pipelining, dual MAC architecture, SIMD architectural technique, Very Long Instruction Word (VLIW) architecture, superscalar architecture, multiple cores, CPU programming model.

  4. DSP instruction set: DSP programming model, orthogonality, specialized addressing modes, specialized instructions, parallel data moving, hardware loops.

  5. Dedicated software and hardware tools: compiler, assembler/linker, simulator, debugger, emulator and evaluation module.

  6. Real time operating systems: basic definitions, monitors, data streams, vectors, tables, exceptions, memory management, library.

All subjects are presented based on DSP56xxx (Motorola), TMS320C2xxx, TMS320C5xxx, TMS320C6xxx (Texas Instruments) processor families and DSP/BIOS (Texas Instruments) real time operating system. Selected topics are shown based on other processor families and manufacturers.

Laboratory contents

Laboratory exercises 2-4 using all materials of the "TMS320C6000 Hands-On Workshop" with the Texas Instruments permission for Digital Signal Processors Architecture and Programming course.

Exercise 1: Write the program for DSP56300 processor family using assembler language and DSP Suite56 environment.

Exercise 2: Reset Board and Start CCS, Configure CCS Environment, Create a CDB file, Run and Debug Code.

Exercise 3: Configure and initialize hardware interrupts, interrupt service routine, use McBSP serial port, use codec, generate sine wave signal.

Exercise 4: Configuring cache and memory buffer, EDMA initialization. Introduction to DSP/BIOS, create SWI, visualizing the program, using LOG_printf, adding a second load thread, using statistics, using RTDX and RTA.

Exercise 5: Write the program for TMS320C5416 processor using assembler language and CCS Environment for TMS320C5416 DSK module.

Project contents

Write the program for DSP processor. Test it with software simulator and with hardware evaluation module.

References

Textbook:

  1. Lapsley P., Bier J., Shoham A., Lee E.A., "DSP processors fundamentals, Architectures and features", Berkeley Design Technology, Inc, Fremont, 1996; John Wiley & Sons, 1997.

References:

  1. Marven C., Ewers G., "A simple approach to digital signal processing", Texas Instruments, 1993. (John Wiley & Sons, 1996) (Marven C., Ewers G., "Zarys cyfrowego przetwarzania sygnałów" WKŁ, 1999.)
  2. Dahnoun N, "Digital signal processing implementation using the TMS320C6000 DSP platform", Prentice Hall, 2000
  3. Andy Bateman, Iain Paterson-Stephens, "The DSP Handbook, Algorithms, Applications and Design Techniques", Prentice-Hall, 2002,
  4. Rulph Chassaing, "DSP Applications Using C and the TMS320C6x DSK", John Wiley & Sons; 2002.
  5. "2003 DSP directory", EDN, 3.04.2003. (www.ednmag.com)
  6. "TMS320C6000 CPU and Instruction Set Reference Guide", Texas Instruments, SPRU189.
  7. "TMS320C6000 Peripherals Reference Guide" , Texas Instruments, SPRU190.
  8. "TMS320C6000 DSP/BIOS User's Guide", Texas Instruments, SPRU303.
  9. "TMS320C54x User's Guide", Texas Instruments, 1993.
  10. Steven W. Smith, "The Scientist and Engineer's Guide to Digital Signal Processing", Analog Devices, 1999.
Summary

Presentation of modern digital signal processor (DSP) architecture and applications. Presentation of typical DSP processor architecture and its programming techniques. On completion of this module student should know and understand: basics of DSP, internal architecture of DSP chips, dedicated software and hardware tools, programming languages, basics of dedicated real time operating systems.